celian-ringwald

Celian-ringwald's group workspace

Group: DS_TurtleUtlraLight_pileT5_pile-t5-base

1-5

of 5

Tags

Notes

Author

celian-ringwald

State

Finished

Start time

August 24th, 2024 3:44:18 AM

Runtime

46m 53s

Tracked hours

46m 48s

Run path

celian-ringwald/12ShadesOfRDFExtension/tx4yh3yn

Linux-3.10.0-1160.42.2.el7.x86_64-x86_64-with-glibc2.17

Python version

3.11.5

Command

/home/cringwald/EXP_env2/EXP_env_Az/./src/train_withShape.py model=pilet5_base_model data=DS_turtle_ultra_light_pilet5 train=t5_dbpedia

System Hardware

CPU count	52
Logical CPU count	52
GPU count	1
GPU type	NVIDIA A100 80GB PCIe

W&B CLI Version

0.16.6

Group

DS_TurtleUtlraLight_pileT5_pile-t5-base

Config parameters are your model's inputs. Learn more

▶
Config parameters:{} 110 keys
- adafactor:
  true
- adam_beta1:
  0.9
- adam_beta2:
  0.999
- adam_epsilon:
  0.00000001
- add_vocab:
  true
- amp_level:
  null
- apply_early_stopping:
  true
- attention_dropout:
  null
- bf16:
  true
- cache_dir:
  null
- checkpoint_path:
  null
- classifier:
  false
- config_name:
  "EleutherAI/pile-t5-base"
- dataloader_drop_last:
  false
- dataloader_num_workers:
  2
- dataloader_pin_memory:
  true
- dataset_name:
  "/home/cringwald/EXP_env/datasets/t5_dbpedia.py"
- datatype:
  true
- decoder_layerdrop:
  null
- deepspeed:
  null
- disable_tqdm:
  null
- do_eval:
  true
- do_predict:
  true
- do_train:
  true
- dropout:
  0.1
- eval_accumulation_steps:
  null
- eval_batch_size:
  8
- eval_beams:
  3
- eval_steps:
  null
- evaluation_strategy:
  "no"
- facto:
  true
- finetune:
  false
- fp16:
  false
- gpus:
  1
- gradient_acc_steps:
  8
- gradient_accumulation_steps:
  1
- gradient_clip_value:
  10
- greater_is_better:
  false
- group_by_length:
  true
- ignore_data_skip:
  false
- ignore_pad_token_for_loss:
  true
- inline_mode:
  false
- label_names:
  null
- label_smoothing:
  0
- label_smoothing_factor:
  0
- learning_rate:
  0.001
- vocab_file:
  "/workspace/cringwald/exp6_out/syntaxes_vocab.json"
- vocab_mapp_file:
  "/workspace/cringwald/exp6_out/syntaxes_mapped.json"
- warmup_steps:
  100
- weight_decay:
  0.01

Summary metrics are your model's outputs. Learn more

▶
Summary metrics:{} 72 keys
- epoch:
  11
- loss:
  0.00023582737776450813
- lr-Adafactor/pg1:
  0.0009874974974974976
- lr-Adafactor/pg2:
  0.0009874974974974976
- test_BLEU:
  0.944100022315979
- test_dist_edit:
  75.67148760330579
- test_F1_macro:
  99.4370960404611
- test_F1_micro:
  99.2798080444336
- test_loss:
  0.001574029796756804
- test_mean_nbRel_Gt:
  4.708000183105469
- test_mean_nbRel_Pred:
  3.6065890789031982
- test_part_parsed:
  0.515999972820282
- test_part_subj_ok:
  0
- test_part_valid:
  0.5040000081062317
- test_prec_macro:
  99.94331065759636
- test_prec_micro:
  99.89264678955078
- test_recall_macro:
  98.94292317467048
- test_recall_micro:
  98.67444610595705
- testpred_alias_f1:
  100
- testpred_alias_fn:
  0
- testpred_alias_fp:
  0
- testpred_alias_nb_gt:
  11
- testpred_alias_nb_pred:
  6
- testpred_alias_tp:
  6
- testpred_birthDate_f1:
  98.80477905273438
- testpred_birthDate_fn:
  12
- testpred_birthDate_fp:
  0
- testpred_birthDate_nb_gt:
  983
- testpred_birthDate_nb_pred:
  496
- testpred_birthDate_tp:
  496
- testpred_birthName_f1:
  98.63013458251952
- testpred_birthName_fn:
  1
- testpred_birthName_fp:
  0
- testpred_birthName_nb_gt:
  65
- testpred_birthName_nb_pred:
  38
- testpred_birthName_tp:
  36
- testpred_birthYear_f1:
  100
- testpred_birthYear_fn:
  0
- testpred_birthYear_fp:
  0
- testpred_birthYear_nb_gt:
  1,000
- testpred_birthYear_nb_pred:
  516
- testpred_birthYear_tp:
  516
- testpred_deathDate_f1:
  100
- testpred_deathDate_fn:
  0
- testpred_deathDate_fp:
  0
- testpred_deathDate_nb_gt:
  320
- val_part_subj_ok:
  0
- val_part_valid:
  0.47999998927116394
- val_prec_macro:
  79.04761904761905
- val_recall_macro:
  76.63522012578616

This run produced these artifacts as outputs. Total: 70. Learn more

wandb-history

run-tx4yh3yn-history:v0

Celian-ringwald's group workspace

DS_TurtleUtlraLight_pileT5_pile-t5-base

DS_TurtleUtlraLight_pileT5_pile-t5-base_4